| Autor: |
Katoh, Kentaroh, Itagaki, Kei, Hoshina, Shinichiro |
| Zdroj: |
1st IEEE Global Conference on Consumer Electronics 2012; 1/ 1/2012, p726-727, 2p |
| Abstrakt: |
High-speed digital LSIs such as CPU, graphic processing LSI, and System-on-a-chip, are indispensable for all the today's consumer electrics. However, such today's high performance LSIs require careful debugging for timing related errors and high quality delay fault testing for the dependability. This paper presents time-multiplexed on-chip delay measurement to realize fast and high quality timing error debugging and delay fault testing. According to the experimental result, the measurement time of the proposed method is 2.5 % of the conventional one. [ABSTRACT FROM PUBLISHER] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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