A 0.65V embedded SDRAM with smart boosting and power management in a 45nm CMOS technology.

Autor: Pyo, Suk-Soo, Kim, Jun-Sung, Kim, Jung-Han, Jung, Hyun-Taek, Song, Tae-Joong, Lee, Cheol-Ha, Kim, Gyu-Hong, Lee, Young-Keun, Kim, Kee-Sup
Zdroj: Proceedings of the IEEE 2012 Custom Integrated Circuits Conference; 1/ 1/2012, p1-4, 4p
Abstrakt: In this paper, an embedded SDRAM (eSDRAM) with smart boosting and power management (SB-PM) scheme for low power operation has been designed. SB-PM scheme decreases 40.3% of dynamic power and 69.1% of standby power consumption with ECC compared with the conventional scheme. A 266-Mb eSDRAM with SB-PM scheme is designed in a 45-nm CMOS technology showing 51.2-mW dynamic power and 2.05mW standby power consumption at VDD=0.65V and 85˚C. [ABSTRACT FROM PUBLISHER]
Databáze: Complementary Index