| Abstrakt: |
This paper formulates and solves a multiple real-constant multiplication (MRCM) problem, where the goal is to find a multiplierless shift-add network that implements the multiplication of a signal by real constants, in a way which minimizes hardware cost subject to error constraints. Unlike our previous work, here we consider an improved hardware cost model, whereby instead of simply counting the number of adders needed, we count the number of bits required, which is more realistic. We also introduce two algorithms for solving the MRCM problem, namely: (i) a greedy algorithm without backtracking that heuristically traverses an exponentially growing search tree and rapidly produces a suboptimal solution; and (ii) an exact algorithm that exploits known cost upper bounds to determine whether and how to expand the search tree, leading to an optimal solution at the expense of longer execution time. Finally, we present a set of experimental results that compares the two algorithms with the Hcub algorithm. [ABSTRACT FROM PUBLISHER] |
