Characterization and modelling of Si-substrate noise induced by RF signal propagating in TSV of 3D-IC stack.

Autor: Brocard, M., Le Maitre, P., Bermond, C., Bar, P., Anciant, R., Farcy, A., Lacrevaz, T., Leduc, P., Coudrain, P., Hotellier, N., Ben Jamaa, H., Cheramy, S., Sillon, N., Marin, J-C., Flechet, B.
Zdroj: 2012 IEEE 62nd Electronic Components & Technology Conference; 1/ 1/2012, p665-672, 8p
Abstrakt: TSVs in 3D integrated circuits are a source of noise that can affect nearby transistor performance. So an analytical physics-based model of the TSV-to-substrate coupling is proposed to perform time domain or noise simulations. Silicon measurements at low frequencies and radiofrequencies are reported. Simulations are done using a software performing device and electromagnetic co-simulations. The model and simulations are validated by measurements. Simulations to study the sensitivity of the TSV structure to the layout show changes in the TSV-to-substrate coupling behavior. [ABSTRACT FROM PUBLISHER]
Databáze: Complementary Index