Power management of multi-core chips: Challenges and pitfalls.

Autor: Bose, Pradip, Buyuktosunoglu, Alper, Darringer, John A., Gupta, Meeta S., Healy, Michael B., Jacobson, Hans, Nair, Indira, Rivers, Jude A., Shin, Jeonghee, Vega, Augusto, Weger, Alan J.
Zdroj: 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE); 1/ 1/2012, p977-982, 6p
Abstrakt: Modern processor systems are equipped with on-chip or on-board power controllers. In this paper, we examine the challenges and pitfalls in architecting such dynamic power management control systems. A key question that we pose is: How to ensure that such managed systems are “energy-secure” and how to pursue pre-silicon modeling to ensure such security? In other words, we address the robustness and security issues of such systems. We discuss new advances in energy-secure power management, starting with an assessment of potential vulnerabilities in systems that do not address such issues up front. [ABSTRACT FROM PUBLISHER]
Databáze: Complementary Index