An efficient linearity test for on-chip high speed ADC and DAC using loop-back.
Autor: | Chun, Ji Hwan (Paul), Yu, Hak-soo, Abraham, Jacob A. |
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Zdroj: | Proceedings of the 14th ACM Great Lakes Symposium: VLSI; 4/26/2004, p328-331, 4p |
Databáze: | Complementary Index |
Externí odkaz: |