Design sensitivity of single event transients in scaled logic circuits.
| Autor: | Velamala, Jyothi, LiVolsi, Robert, Torres, Myra, Cao, Yu |
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| Zdroj: | 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC); Jun2011, p694-699, 6p |
| Databáze: | Complementary Index |
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