Asymmetric 6T SRAM with two-phase write and split bitline differential sensing for low voltage operation.

Autor: Nalam, S., Chandra, V., Pietrzyk, C., Aitken, R.C., Calhoun, B.H.
Zdroj: 2010 11th International Symposium on Quality Electronic Design (ISQED); 2010, p139-146, 8p
Databáze: Complementary Index