Super scalar architecture for billion device combinational and sequential circuit test design.
| Autor: | Venkateswaran, N., Balaji, V., Mahalingam, V., Rajaprabhu, T.L. |
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| Zdroj: | Proceedings AUTOTESTCON 2003. IEEE Systems Readiness Technology Conference; 2003, p658-663, 6p |
| Databáze: | Complementary Index |
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