Stress memorization in high-performance FDSOI devices with ultra-thin silicon channels and 25nm gate lengths.
| Autor: | Singh, D.V., Sleight, J.W., Hergenrother, J.M., Ren, Z., Jenkins, K.A., Dokumaci, O., Black, L., Chang, J.B., Nakayama, H., Chidambarrao, D., Venigalla, R., Pan, J., Natzle, W., Tessier, B.L., Nomura, A., Ott, J.A., Ieong, M., Haensch, W. |
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| Zdroj: | IEEE International Electron Devices Meeting, 2005. IEDM Technical Digest; 2005, p505-508, 4p |
| Databáze: | Complementary Index |
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