Overlay-aware interconnect yield modeling in double patterning lithography.
| Autor: | Mirsaeedi, M., Anis, M. |
|---|---|
| Zdroj: | 2010 IEEE International Conference on IC Design & Technology (ICICDT); 2010, p138-141, 4p |
| Databáze: | Complementary Index |
| Externí odkaz: |
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| Autor: | Mirsaeedi, M., Anis, M. |
|---|---|
| Zdroj: | 2010 IEEE International Conference on IC Design & Technology (ICICDT); 2010, p138-141, 4p |
| Databáze: | Complementary Index |
| Externí odkaz: |
|