Demonstration of a 4 Mb, high density ferroelectric memory embedded within a 130 nm, 5 LM Cu/FSG logic process.
| Autor: | Moise, T.S., Summerfelt, S.R., McAdams, H., Aggarwal, S., Udayakumar, K.R., Celii, F.G., Martin, J.S., Xing, G., Hall, L., Taylor, K.J., Hurd, T., Rodriguez, J., Remack, K., Khan, M.D., Boku, K., Stacey, G., Yao, M., Albrecht, M.G., Zielinski, E., Thakre, M. |
|---|---|
| Zdroj: | Digest. International Electron Devices Meeting; 2002, p535-538, 4p |
| Databáze: | Complementary Index |
| Externí odkaz: |
|