Dependable SRAM with enhanced read-/write-margins by fine-grained assist bias control for low-voltage operation.
Autor: | Nii, K., Yabuuchi, M., Fujiwara, H., Nakano, H., Ishihara, K., Kawai, H., Arimoto, K. |
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Zdroj: | 2010 IEEE International SOC Conference (SOCC); 2010, p519-524, 6p |
Databáze: | Complementary Index |
Externí odkaz: |