Spatial avoidance of hardware faults using FPGA partial reconfiguration of tile-based soft processors.
| Autor: | Gauer, C., LaMeres, B.J., Racek, D. |
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| Zdroj: | 2010 IEEE Aerospace Conference; 2010, p1-11, 11p |
| Databáze: | Complementary Index |
| Externí odkaz: |
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| Autor: | Gauer, C., LaMeres, B.J., Racek, D. |
|---|---|
| Zdroj: | 2010 IEEE Aerospace Conference; 2010, p1-11, 11p |
| Databáze: | Complementary Index |
| Externí odkaz: |
|