Threshold-voltage variations effects on the reliability of nano-scale CMOS logic gates.
| Autor: | Sulieman, M.H. |
|---|---|
| Zdroj: | 2009 9th IEEE Conference on Nanotechnology (IEEE-NANO); 2009, p744-747, 4p |
| Databáze: | Complementary Index |
| Externí odkaz: |
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| Autor: | Sulieman, M.H. |
|---|---|
| Zdroj: | 2009 9th IEEE Conference on Nanotechnology (IEEE-NANO); 2009, p744-747, 4p |
| Databáze: | Complementary Index |
| Externí odkaz: |
|