Efficient implementation of parallel BCD multiplication in LUT-6 FPGAs.
| Autor: | Va?zquez, A., de Dinechin, F. |
|---|---|
| Zdroj: | 2010 International Conference on Field-Programmable Technology (FPT); 2010, p126-133, 8p |
| Databáze: | Complementary Index |
| Externí odkaz: |
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| Autor: | Va?zquez, A., de Dinechin, F. |
|---|---|
| Zdroj: | 2010 International Conference on Field-Programmable Technology (FPT); 2010, p126-133, 8p |
| Databáze: | Complementary Index |
| Externí odkaz: |
|