New port modeling for analog circuit biasing design.
| Autor: | Hashemian, R. |
|---|---|
| Zdroj: | 2010 IEEE International Conference on Electro/Information Technology (EIT); 2010, p1-5, 5p |
| Databáze: | Complementary Index |
| Externí odkaz: |
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| Autor: | Hashemian, R. |
|---|---|
| Zdroj: | 2010 IEEE International Conference on Electro/Information Technology (EIT); 2010, p1-5, 5p |
| Databáze: | Complementary Index |
| Externí odkaz: |
|