A 64Mb Chain FeRAM with Quad-BL Architecture and 200MB/s Burst Mode.
| Autor: | Hoya, K., Takashima, D., Shiratake, S., Ogiwara, R., Miyakawa, T., Shiga, H., Doumae, S.M., Ohtsuki, S., Kumura, Y., Shuto, S., Ozaki, T., Yamakawa, K., Kunishima, I., Nitayama, A., Fujii, S. |
|---|---|
| Zdroj: | 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers; 2006, p459-466, 8p |
| Databáze: | Complementary Index |
| Externí odkaz: |
|