A functional 0.69 μm2 embedded 6T-SRAM bit cell for 65 nm CMOS platform.

Autor: Arnaud, F., Boeuf, F., Salvetti, F., Lenoble, D., Wacquant, F., Regnier, C., Morin, P., Emonet, N., Denis, E., Oberlin, J.C., Ceccarelli, D., Vannier, P., Imbert, G., Sicard, A., Perrot, C., Belmont, O., Guilmeau, I., Sassoulas, P.O., Delmedico, S., Palla, R.
Zdroj: 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407); 2003, p65-66, 2p
Databáze: Complementary Index