Destructive-read random access memory system buffered with destructive-read memory cache for SoC applications.
| Autor: | Ji, B.L., Munetoh, S., Chorng-Lii Hwang, Wordeman, M., Kirihata, T. |
|---|---|
| Zdroj: | 2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408); 2003, p85-88, 4p |
| Databáze: | Complementary Index |
| Externí odkaz: |
|