Stacked 3-dimensional 6T SRAM cell with independent double gate transistors.
| Autor: | Weis, M., Pfitzner, A., Kasprowicz, D., Emling, R., Fischer, T., Henzler, S., Maly, W., Schmitt-Landsiedel, D. |
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| Zdroj: | 2009 IEEE International Conference on IC Design & Technology; 2009, p169-172, 4p |
| Databáze: | Complementary Index |
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