A unified method to handle different kinds of placement constraints in floorplan design.
Autor: | Young, E.F.Y., Chu, C.C.N., Ho, M.L. |
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Zdroj: | Proceedings of ASP-DAC/VLSI Design 2002. 7th Asia & South Pacific Design Automation Conference & 15h International Conference on VLSI Design; 2002, p661-667, 7p |
Databáze: | Complementary Index |
Externí odkaz: |