A 16mW, 2.23-2.45GHz fully integrated ΣΔ PLL with novel prescaler and loop filter in 0.35μm CMOS.
Autor: | Keliu Shu, Sanchez-Sinencio, E., Silva-Martinez, J., Embabi, S.H.K. |
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Zdroj: | IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2003; 2003, p181-184, 4p |
Databáze: | Complementary Index |
Externí odkaz: |