A 16mW, 2.23-2.45GHz fully integrated ΣΔ PLL with novel prescaler and loop filter in 0.35μm CMOS.

Autor: Keliu Shu, Sanchez-Sinencio, E., Silva-Martinez, J., Embabi, S.H.K.
Zdroj: IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2003; 2003, p181-184, 4p
Databáze: Complementary Index