Highly cost effective and high performance 65nm S3 (stacked single-crystal Si) SRAM technology with 25F2, 0.16um2 cell and doubly stacked SSTFT cell transistors for ultra high density and high speed applications.
| Autor: | Soon-Moon Jung, Youngseop Rah, Taehong Ha, Hanbyung Park, Chulsoon Chang, Seungchul Lee, Jongho Yun, Wonsuk Cho, Hoon Lim, Jaikyun Park, Jaehun Jeong, Byoungkeun Son, Jaehoon Jang, Bonghyun Choi, Hoosung Cho, Kinam Kim |
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| Zdroj: | 2005 Digest of Technical Papers. 2005 Symposium on VLSI Technology; 2005, p220-221, 2p |
| Databáze: | Complementary Index |
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