Reconfigurable Logic Element using a Chaotic Circuit.
| Autor: | Murali, K., Sinha, S., Ditto, W.L. |
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| Zdroj: | APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits & Systems; 2006, p1839-1842, 4p |
| Databáze: | Complementary Index |
| Externí odkaz: |
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| Autor: | Murali, K., Sinha, S., Ditto, W.L. |
|---|---|
| Zdroj: | APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits & Systems; 2006, p1839-1842, 4p |
| Databáze: | Complementary Index |
| Externí odkaz: |
|