Gate-level optimization of polymorphic circuits using Cartesian Genetic Programming.
| Autor: | Gajda, Z., Sekanina, L. |
|---|---|
| Zdroj: | 2009 IEEE Congress on Evolutionary Computation; 2009, p1599-1604, 6p |
| Databáze: | Complementary Index |
| Externí odkaz: |
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| Autor: | Gajda, Z., Sekanina, L. |
|---|---|
| Zdroj: | 2009 IEEE Congress on Evolutionary Computation; 2009, p1599-1604, 6p |
| Databáze: | Complementary Index |
| Externí odkaz: |
|