Multi-Slew-Rate Output Driver and Optimized Impedance-Calibration Circuit for 66nm 3.0Gb/s/pin DRAM Interface.
| Autor: | Dong Uk Lee, Shin Deok Kang, Nak Kyu Park, Hyun Woo Lee, Young Kyoung Choi, Jung Woo Lee, Seung Wook Kwack, Hyeong Ouk Lee, Won Joo Yun, Sang Hoon Shin, Kwan Weon Kim, Young Jung Choi, Ye Seok Yang |
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| Zdroj: | 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers; 2008, p280-613, 334p |
| Databáze: | Complementary Index |
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