FPGA implementation of variants of min-sum algorithm.
| Autor: | Tolouei, S., Banihashemi, A.H. |
|---|---|
| Zdroj: | 2008 24th Biennial Symposium on Communications; 2008, p80-83, 4p |
| Databáze: | Complementary Index |
| Externí odkaz: |
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| Autor: | Tolouei, S., Banihashemi, A.H. |
|---|---|
| Zdroj: | 2008 24th Biennial Symposium on Communications; 2008, p80-83, 4p |
| Databáze: | Complementary Index |
| Externí odkaz: |
|