Utilization of all Levels of Parallelism in a Processor Array with Subword Parallelism.
Autor: | Schaffer, R., Merker, R., Hannig, F., Teich, J. |
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Zdroj: | 2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods & Tools; 2008, p391-398, 8p |
Databáze: | Complementary Index |
Externí odkaz: |