An RTL-to-Grid Design Flow for Power Grid Verification Based on a Statistical Estimation Engine.
| Autor: | Karampatzakis, D.P., Evmorfopoulos, N.E., Tsiampas, M.K., Stamoulis, G.I. |
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| Zdroj: | 2006 Ph.D. Research in Microelectronics & Electronics; 2006, p37-40, 4p |
| Databáze: | Complementary Index |
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