Analysis of wafer process duration for ab initio calculation of capacity, throughput and bottleneck equipments in a wafer fab.

Autor: Etzel, H., Staudt, P., Oertel, H., Dudde, R.
Zdroj: 2004 IEEE/SEMI Advanced Semiconductor Manufacturing Conference & Workshop (IEEE Cat. No.04CH37530); 2004, p330-333, 4p
Databáze: Complementary Index