Analysis of wafer process duration for ab initio calculation of capacity, throughput and bottleneck equipments in a wafer fab.
Autor: | Etzel, H., Staudt, P., Oertel, H., Dudde, R. |
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Zdroj: | 2004 IEEE/SEMI Advanced Semiconductor Manufacturing Conference & Workshop (IEEE Cat. No.04CH37530); 2004, p330-333, 4p |
Databáze: | Complementary Index |
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