A low-noise 2-GB/s 256-Mb packet-based DRAM with a robust array power supply.
| Autor: | Kee-Won Kwon, Byung-Sick Moon, Changhyun Kim, Soo-In Cho |
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| Zdroj: | 2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302); 2002, p116-117, 2p |
| Databáze: | Complementary Index |
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