A 120 mW embedded 3D graphics rendering engine with 6 Mb logically local frame-buffer and 3.2 GByte/s run-time reconfigurable bus for PDA-chip.
| Autor: | Ramchan Woo, Chi-Weon Yoon, Jeonghoon Kook, Se-Joong Lee, Kangmin Lee, Yong-Ha Park, Hoi-Jun Yoo |
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| Zdroj: | 2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185); 2001, p95-98, 4p |
| Databáze: | Complementary Index |
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