The design and analysis of the clock distribution network for a 1.2 GHz Alpha microprocessor.
Autor: | Xanthopoulos, T., Bailey, D.W., Gangwar, A.K., Gowan, M.K., Jain, A.K., Prewitt, B.K. |
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Zdroj: | 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177); 2001, p402-403, 2p |
Databáze: | Complementary Index |
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