High-PSRR all-digital delay locked loop with burst update mode and power noise damping scheme.
| Autor: | Yongju Kim, Jaemin Jang, Jinyeong Moon, Seongjun Lee, Daehan Kwon, Hongseok Choi, Geunwoo Park, Byongtae Chung |
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| Zdroj: | 2011 Symposium on VLSI Circuits (VLSIC); 2011, p156-157, 2p |
| Databáze: | Complementary Index |
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