An open-loop clock generator for fast frequency scaling in 65nm CMOS technology.
| Autor: | Hoppner, S., Henker, S., Eisenreich, H., Schuffny, R. |
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| Zdroj: | 2011 Proceedings of the 18th International Conference Mixed Design of Integrated Circuits & Systems (MIXDES); 2011, p264-269, 6p |
| Databáze: | Complementary Index |
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