Impact of board configuration and shock loading conditions for board level drop test.
Autor: | Guruprasad, P., Roggeman, B., Pitarresi, J. |
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Zdroj: | 2011 IEEE 61st Electronic Components & Technology Conference (ECTC); 2011, p2067-2072, 6p |
Databáze: | Complementary Index |
Externí odkaz: |