Test pattern generation for sequential MOS circuits by symbolic fault simulation.
| Autor: | Cho, K., Bryant, R. E. |
|---|---|
| Zdroj: | DAC: Annual ACM/IEEE Design Automation Conference; Jun1989, p418-423, 6p |
| Databáze: | Complementary Index |
| Externí odkaz: |
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| Autor: | Cho, K., Bryant, R. E. |
|---|---|
| Zdroj: | DAC: Annual ACM/IEEE Design Automation Conference; Jun1989, p418-423, 6p |
| Databáze: | Complementary Index |
| Externí odkaz: |
|