| Autor: |
Wyatt, John, Keast, Craig, Seidel, Mark, Standley, David, Horn, Berthold, Knight, Tom, Sodini, Charles, Lee, Hae-Seung, Poggio, Tomaso |
| Zdroj: |
International Journal of Computer Vision; Sep1992, Vol. 8 Issue 3, p217-230, 14p |
| Abstrakt: |
This article describes a project to design and build prototype analog early vision systems that are remarkably low-power, small, and fast. Three chips are described in detail. A continuous-time CMOS imager and processor chip uses a fully parallel 2-D resistive grid to find an object's position and orientation at 5000 frames/second, using only 30 milliwatts of power. A CMOS/CCD imager and processor chip does high-speed image smoothing and segmentation in a clocked, fully parallel 2-D array. And a chip that merges imperfect depth and slope data to produce an accurate depth map is under development in switched-capacitor CMOS technology. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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