Demonstration of full-field patterning of 32 nm test chips using EUVL.

Autor: Vandentop, Gilroy, Chandhok, Manish, Putna, Ernisse S., Younkin, Todd R., Clarke, James S., Carson, Steven, Myers, Alan, Leeson, Michael, Zhang, Guojing, Liang, Ted, Murachi, Tetsunori
Zdroj: Proceedings of SPIE; Nov2009, Issue 1, p727116-727116-9, 9p
Databáze: Complementary Index