Application results of lot-to-lot high-order overlay correction for sub-60-nm memory device fabrication.
| Autor: | Shin, Jangho, Nam, Sangmo, Kim, Taekyu, Bae, Yong-Kug, Lee, Junghyeon |
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| Zdroj: | Proceedings of SPIE; Nov2009 Part 2, Issue 1, p72721R-72721R-5, 5p |
| Databáze: | Complementary Index |
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