| Autor: |
Han, Ruonan, Zhang, Yaming, Coquillat, Dominique, Videlier, Hadley, Knap, Wojciech, Brown, Elliott, O, Kenneth K. |
| Předmět: |
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| Zdroj: |
IEEE Journal of Solid-State Circuits; Oct2011, Vol. 46 Issue 11, p2602-2612, 11p |
| Abstrakt: |
A 2 \times 2 array of 280-GHz Schottky-barrier diode detectors with an on-chip patch antenna (255\times\, 250 \mum^2) is fabricated in a 130-nm logic CMOS process. The series resistance of diode is minimized using poly-gate separation (PGS), and exhibits a cut-off frequency of 2 THz. Each detector unit can detect an incident carrier with 100-Hz \sim 2-MHz amplitude modulation. At 1-MHz modulation frequency, the estimated voltage responsivity and noise equivalent power (NEP) of the detector unit are 250 V/W and 33 \pW/Hz^1/2, respectively. An integrated low-noise amplifier further boosts the responsivity to 80 kV/W. At supply voltage of 1.2 V, the entire chip consumes 1.6 mW. The array occupies 1.5\times\, 0.8 mm^2. A set of millimeter-wave images with a signal-noise ratio of 48 dB is formed using the detector. These suggest potential utility of Schottky diode detectors fabricated in CMOS for millimeter wave and sub-millimeter wave imaging. [ABSTRACT FROM PUBLISHER] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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