Employing Step-and-Flash imprint lithography for gate-level patterning of a MOSFET device.
| Autor: | Smith, Britain J., Stacey, Nicholas A., Donnelly, J. P., Onsongo, David M., Bailey, Todd C., Mackay, Chris J., Resnick, Douglas J., Dauksher, William J., Mancini, David P., Nordquist, Kevin J., Sreenivasan, S. V., Banerjee, Sanjay K., Ekerdt, John G., Willson, Grant C. |
|---|---|
| Zdroj: | Proceedings of SPIE; Nov2003, Issue 1, p1029-1034, 6p |
| Databáze: | Complementary Index |
| Externí odkaz: |
|