Assessing technology options for 65-nm logic circuits.
| Autor: | Pramanik, Dipankar, Cote, Michel L., Beaudette, Kevin, Axelrad, Valery |
|---|---|
| Zdroj: | Proceedings of SPIE; Nov2003, Issue 1, p30-41, 12p |
| Databáze: | Complementary Index |
| Externí odkaz: |
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| Autor: | Pramanik, Dipankar, Cote, Michel L., Beaudette, Kevin, Axelrad, Valery |
|---|---|
| Zdroj: | Proceedings of SPIE; Nov2003, Issue 1, p30-41, 12p |
| Databáze: | Complementary Index |
| Externí odkaz: |
|