Optimizing gate layer OPC correction and SRAF placement for maximum design manufacturability.
| Autor: | Brist, Travis, Hong, Le, Yehia, Ayman, Tawfik, Tamer, Shang, Shumay, Sakajiri, Kyohei, Sturtevant, John L. |
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| Zdroj: | Proceedings of SPIE; Nov2007 Part 2, Issue 1, p65211L-65211L-10, 10p |
| Databáze: | Complementary Index |
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