FPGA chip performance improvement with gate shrink through alternating PSM 90nm process.
| Autor: | Yu, Chun-Chi, Shieh, Ming-Feng, Liu, Erick, Lin, Benjamin, Ho, Jonathan, Wu, Xin, Panaite, Petrisor, Chacko, Manoj, Zhang, Yunqiang, Lei, Wen-Kang |
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| Zdroj: | Proceedings of SPIE; Nov2005 Part 2, Issue 1, p59925A-59925A-13, 13p |
| Databáze: | Complementary Index |
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