Study of SILC and Interface Trap Generation Due to High Field Stressing and Its Operating Temperature Dependence in 2.2 nm Gate Dielectrics.
| Autor: | Borse, D. G., Vaidya, S. J., Chandorkar, Arun N. |
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| Zdroj: | IEEE Transactions on Electron Devices; Apr2002, Vol. 49 Issue 4, p699, 3p, 2 Charts, 5 Graphs |
| Abstrakt: | Presents a study of metal-oxide-semiconductor capacitors with 2.2 nm dry and nitric oxide grown gate dielectrics. Effect of nitrogen annealing at 400 ° celcius; Interface trap generation during constant voltage; Methodology and results. |
| Databáze: | Complementary Index |
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