| Autor: |
Khorram, Hamid R., Nakano, Katsushi, Sagawa, Natsuko, Fujiwara, Tomoharu, Iriuchijima, Yasuhiro, Sei, Toshi, Takahiro, Tomioka, Nakamura, Keichi, Shiraishi, Kenichi, Hayashi, Tsunehito |
| Předmět: |
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| Zdroj: |
IEEE Transactions on Semiconductor Manufacturing; 05/01/2011, Vol. 24 Issue 2, p173-181, 9p |
| Abstrakt: |
The complexity and extra cost associated with a resist topcoat (TC) layer has motivated the industry to transition to TC-less resist processes. By switching to TC-less resists, track suppliers are able to achieve higher throughput using less costly equipment, scanner suppliers can increase the scanning speed of their litho systems with minimized risk of defects, and end users eliminate a process step and gain increased output at a lower cost. These factors become increasingly critical as a result of the heightened processing complexities associated with double patterning lithography. In addition to reduction in process complexity benefits, a TC-less process must also satisfy the other critical performance criteria, and results for overlay, autofocus, and imaging will be discussed. To justify transition to a new process, there also should be demonstration of associated cost reduction or productivity improvements. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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