| Autor: |
Hofmeister, J.P., Judkins, J.B., Goodman, D., Tracy, T.A., Roth, N.N. |
| Zdroj: |
IEEE Aerospace & Electronic Systems; Jun2008, Vol. 23 Issue 6, p31-38, 8p |
| Abstrakt: |
As FPGA density and overall usage increases, there is a corresponding and growing need to monitor these solder joint networks. Prior to the introduction of a first sensor, SJ BISTtrade (SJ Built-in-Self-Testtrade), there were no known methods for detecting faults in the solder joint networks of fully-programmed, operational field programmable gate arrays (FPGAs). Because SJ BISTtrade requires over 100 mW at 3.3 V to test 8 FPGA pins, we introduce SJ Monitortrade, a lower-power design (less than 5.0 mW) to provide 24x7 health monitoring of selected I/O pins; the complementary form SJ Monitortrade, can be used to monitor the pins of unpowered FPGAs. SJ Monitor is able to detect all solder joint network faults that last at least as long as 15 nsec and which are at least as low as 100 S2 with no false alarms. This capability allows for detection of faults before they begin to exhibit intermittent failures, which, in turn, facilitates condition-based maintenance to reduce failures during critical missions. [ABSTRACT FROM PUBLISHER] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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