Statistical Yield Modeling for IC Manufacture: Hierarchical Fault Distributions.

Autor: Bogdanov, Yu., Bogdanova, N., Dshkhunyan, V.
Zdroj: Russian Microelectronics; Jan2003, Vol. 32 Issue 1, p51-62, 12p
Abstrakt: A hierarchical approach to the construction of compound distributions for process-induced faults in IC manufacture is proposed. Within this framework, the negative binomial distribution and the compound binomial distribution are treated as level-1 models. The hierarchical approach to fault distribution offers an integrated picture of how fault density varies from region to region within a wafer, from wafer to wafer within a batch, and so on. A theory of compound-distribution hierarchies is developed by means of generating functions. With respect to applications, hierarchies of yield means and yield probability-density functions are considered and an in-process measure of yield loss is introduced. It is shown that the hierarchical approach naturally embraces the Bayesian approach. [ABSTRACT FROM AUTHOR]
Databáze: Complementary Index